The present invention generally relates to faulty bit testing in memory arrays and, more particularly, to such testing directed to faults of a parasitic type, i.e., where undesirable coupling exists between cells "k" and "j" of a memory array such that writing into cell "j" causes a change in cell "k" without intentionally writing into cell "k."
Hamming codes have long been used in the art of memory fault testing and/or data correction. One common type of memory error detecting and data correcting scheme is described, for example, in U.S. Pat. No. 4,005,405, issued on Jan. 25, 1977 to Joseph Thomas West. Provision also is made for storing the physical location (address) of any defective memory word so that a correction word can be rewritten therein. The cited 4,005,405 patent, as well as all others of a similar nature known to the present inventors share one common characteristic, namely, no distinction is made between bit fault types, for example, bit faults of the parasitic type as opposed to the other types, much less is any attempt made to determine the location of the cell (which may be functioning correctly when tested by itself) which causes parasitic failure of some other array cell due to unknown and unwanted coupling.
The known prior art has not focused on parasitic-type faults apparently for the reason that it simply has been content to replace a faulty cell or data bit with an error-free cell or data bit irrespective of the reason behind the fault.